Senior IP Design Engineer

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Role: Senior IP Design EngineerType: ContractLocation: Belfast, UK Hybrid
Job details:Design high-performance IP targeting FPGA/Adaptive SoC technology using SystemVerilog RTL. Deliver synthesis-ready designs meeting timing and integration requirements.
Key Skills:SystemVerilog RTL design100Gb Ethernet, PCIe Gen5, AMBA/AXIDeep understanding of FPGA/Adaptive xbpsjku SoC design flow including P&R and timing closureVivado/Vitis expertisePython/Tcl scriptingGit & CI/CD experience
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Location:
Lisburn
Job Type:
FullTime
Category:
Engineering

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