A rapidly expanding deep-tech start-up in North London is seeking a Senior IC Layout Engineer to focus on designing and verifying analog and mixed-signal IP layout, capable of operating at cryogenic temperatures. The role allows for flexible working, ideally requiring at least 2 days in the office. Candidates should possess strong Cadence skills, expertise in DRC and LVS, and experience with deep sub-micron processes. A competitive salary and benefits, including a company share package, are offered. #J-18808-Ljbffr